1. Field of the Invention
The present invention relates to a display synchronization signal generator in a digital broadcast receiver, and more particularly, to a synchronization signal generator capable of displaying a stable image regardless of a transmission speed of a received broadcast signal in a digital broadcast receiver.
2. Description of the Related Art
The main purpose of digital broadcasting is to provide users with video and audio of higher quality than analog broadcasting and to provide more functions to users by supporting bi-directional communications with the users. The digital broadcasting is transferred to a digital broadcast receiver via a ground wave, satellite, or cable in the form of a motion picture experts group (MPEG)-transport stream (TS).
The MPEG-TS includes video and audio information for a plurality of programs and additional information required for broadcasting. When the conventional digital broadcast receiver receives the MPEG-TS, it selects a channel and a program by carrying out MPEG decoding, divides audio and video signals from the selected program, and outputs the divided audio and video signals. At this time, a transmission speed of the MPEG-TS and a system clock signal used in MPEG decoding are linked to each other.
Thus, when the transmission speed of the MPEG-TS changes, a frequency of the system clock signal used in the MPEG decoding also changes. In other words, as the transmission speed of the MPEG-TS decreases, the frequency of the system clock signal used in the MPEG decoding also decreases, and as the transmission speed of the MPEG-TS increases, the frequency of the system clock signal used in MPEG decoding also increases. The transmission speed of the MPEG-TS may vary with broadcasting stations, programs, or properties of cameras.
In the digital broadcast receiver, a graphics processor manages video data to be output to a display device. A pixel clock signal is a reference clock signal of the graphics processor. The pixel clock signal is linked to the system clock signal used in the MPEG decoding. Thus, as the transmission speed of the MPEG-TS changes, frequencies of the system clock signal used in MPEG decoding and the pixel clock signal also change. If the frequency of the pixel clock signal changes, frequencies of a horizontal synchronization signal and a vertical synchronization signal that are used to output video data from the graphics processor also change.
The graphics processor reads video data stored in a memory by using the horizontal synchronization signal and the vertical synchronization signal and outputs the video data to a display device. Thus, if the frequencies of the horizontal synchronization signal and the vertical synchronization signal change, frequencies of a horizontal synchronization signal and a vertical synchronization signal of the video data output to the display device from the graphics processor also change.
However, a conventional flat panel display device is designed to operate with a horizontal synchronization signal at a fixed frequency. Therefore, if the video data in which the frequency of the horizontal synchronization signal changes is provided to the display device, abnormal states such as horizontal waves, backlight out, or color flickering result on a display screen. As a result, a stable image cannot be displayed.